Electrical Engineering questions for GATE, PSU recruitment and SSC JE draw from network theory, electrical machines, power systems, control systems, measurements and instrumentation, analog and digital electronics, and electromagnetic fields. Numerical answers include the formula used and the unit at each stage, which is where marks are commonly lost even when the approach is correct.
Which of the following is a characteristic of combinational circuits?
Answer: B
Combinational circuits have outputs that depend solely on the current input values, with no memory or feedback elements involved.
Q.7Easy
In the 2024-25 examination pattern, which logic family provides the lowest power consumption?
Answer: C
CMOS (Complementary Metal-Oxide-Semiconductor) logic has the lowest power consumption, making it the preferred choice for modern digital systems and portable devices.
Q.8Easy
The setup time of a flip-flop is defined as:
Answer: B
Setup time is the minimum duration the input data must remain stable and valid before the active clock edge for reliable operation.
Q.9Easy
In a Karnaugh map, what does a larger group of adjacent 1's represent?
Answer: B
Larger groups in K-maps represent simplification with fewer variables in the resulting Boolean expression, reducing circuit complexity.
Q.10Easy
In a multiplexer, the number of select lines required to select from 16 data inputs is:
Answer: B
For 2^n data inputs, n select lines are needed. 2^4 = 16, so 4 select lines are required for a 16-to-1 multiplexer.
Q.11Easy
Which of the following is used to convert analog signals to digital for processing?
Answer: C
ADCs are specifically designed to convert continuous analog signals into discrete digital representations for digital processing systems.
Q.12Easy
A JK flip-flop with J=1, K=1 and clock pulse will:
Answer: C
When both J and K inputs are 1 in a JK flip-flop, the output toggles on the clock pulse, changing from 0 to 1 or 1 to 0.
Q.13Easy
In a 4-to-1 multiplexer, how many select lines are required?
Answer: B
For a 4-to-1 multiplexer, we need log₂(4) = 2 select lines to choose one of 4 input lines.
Q.14Easy
What is the output of an SR flip-flop when S=1 and R=1 (NOR gate implementation)?
Answer: C
When both S=1 and R=1 in NOR-based SR flip-flop, both outputs become 0, which violates the Q and Q' complementary property, making it an invalid state.
Q.15Easy
Which Boolean theorem states that A + 0 = A and A · 1 = A?
Answer: B
The Identity law in Boolean algebra states that any variable combined with identity element (0 for OR, 1 for AND) remains unchanged.
Q.16Easy
In a ripple counter with 4 flip-flops, what is the maximum count?
Answer: B
A 4-bit counter can count from 0 to 2⁴-1 = 15 (binary: 0000 to 1111), giving a maximum count of 15.
Q.17Easy
What is the primary advantage of CMOS logic over TTL logic in modern designs?
Answer: B
CMOS logic offers significantly lower power consumption (only during switching) and better noise margins compared to TTL, making it ideal for modern low-power applications.
Q.18Easy
In a multiplexer with 8 input lines, how many output lines are present?
Answer: A
A multiplexer, regardless of the number of inputs, has only one output line. The select lines determine which input is routed to that output.
Q.19Easy
De Morgan's theorem states that (A·B)' equals:
Answer: A
De Morgan's first theorem states (A·B)' = A' + B'. The complement of AND equals OR of complements.
Q.20Easy
A 4-bit binary counter requires how many flip-flops to count from 0 to 15?
Answer: B
A 4-bit counter can represent 2^4 = 16 states (0 to 15), requiring exactly 4 flip-flops.
