In a three-phase inverter, 180° conduction mode means:
Answer: A
In 180° conduction, each switch conducts for half the fundamental cycle (180°), typically producing a 6-step output. 120° conduction has each switch on for 120° only.
Q.2Hard
Which of the following has the lowest on-state voltage drop among power semiconductor devices?
Answer: B
MOSFETs have the lowest on-state voltage drop (few hundred millivolts) at moderate currents. IGBTs: ~1-2V, SCRs: ~1-2V, Diodes: ~0.7-1V depending on rating.
Q.3Hard
The snubber circuit in power electronics is used to:
Answer: A
Snubber circuits (RC networks) protect switching devices from transient voltage spikes during switching transitions and reduce switching losses.
Q.4Hard
In a soft-start thyristor converter, the firing angle is gradually increased to:
Answer: A
Soft-start increases firing angle gradually from maximum value, reducing dv/dt and inrush current, protecting equipment and supply system from transients.
Q.5Hard
The turn-off time (toff) of a power transistor includes:
Answer: B
Turn-off time (toff) = Storage time (ts) + Fall time (tf). Storage time is delay before current starts decreasing; fall time is the time for current to reach zero.
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Q.6Hard
In a boost converter operating in continuous conduction mode (CCM), the average output voltage relationship is:
Answer: B
Boost converter output voltage: Vo = Vin / (1 - D), where D is duty cycle. This always produces Vo > Vin for 0 < D < 1.
Q.7Hard
The dv/dt rating of a power semiconductor is important because it:
Answer: B
High dv/dt can cause displacement currents through parasitic capacitances, potentially triggering devices unintentionally. dv/dt rating specifies the maximum safe rate of voltage change.
Q.8Hard
In a three-level diode-clamped inverter (Neutral Point Clamped), the advantage over two-level inverter is:
Answer: B
Three-level inverter generates three voltage levels, reducing the step size and dv/dt compared to two-level inverter, thus reducing EMI and stress on motor windings.
Q.9Hard
Which control strategy for a DC-DC converter provides the tightest output voltage regulation under varying input voltage and load conditions?
Answer: B
Closed-loop feedback control with error amplifier and compensation networks provides superior regulation by continuously adjusting duty cycle based on output voltage error.
Q.10Hard
In a synchronous buck converter, the advantages of using a low-side MOSFET instead of a diode are:
Answer: D
Synchronous MOSFETs have lower on-state resistance than diode forward voltage drop, reducing losses. Active switching also allows higher frequency operation with better control.
Q.11Hard
In a forward converter, the energy stored in the magnetizing inductance during the ON time is transferred to:
Answer: C
In a forward converter, when the switch turns OFF, the magnetizing inductance energy is transferred back to the input source through the demagnetization winding
Q.12Hard
The average output voltage of a three-phase half-wave uncontrolled rectifier is:
Answer: A
For a three-phase half-wave uncontrolled rectifier, Vdc = (3√23π) × Vm ≈ 0.827 × Vm
Q.13Hard
In a synchronous rectifier design, the gate drive signal for the MOSFET switch should be synchronized with:
Answer: D
Synchronous rectifier gate drive must be timed with the primary switch to replace the body diode conduction, typically during the primary switch OFF period
Q.14Hard
The phenomenon of 'latch-up' in power semiconductor devices occurs due to:
Answer: B
Latch-up in CMOS and power devices occurs when parasitic p-n-p and n-p-n transistors form a regenerative feedback loop, causing high current and potential device destruction
Q.15Hard
A single-phase half-wave rectifier with a firing angle of 45° is connected to a 230V, 50Hz AC source. Calculate the RMS output voltage.
Answer: D
For half-wave rectifier: Vrms = (Vm/2)√[(π - α + sin(2α))/(2π)] where α = 45° = π/4, Vm = 230√2 = 325.3V. Vrms ≈ 108.6V
Q.16Hard
In a controlled rectifier circuit, the commutation overlap angle (μ) depends on:
Answer: B
Commutation overlap occurs due to finite source impedance. The overlap angle μ = sin⁻¹(ωLₛI/√2×Vline), depending on source inductance and current.
Q.17Hard
Which parameter determines the minimum OFF-time in a PWM converter?
Answer: B
Minimum OFF-time must account for semiconductor recovery characteristics: tOFF(min) = ts + tf, allowing complete device turn-off before the next cycle.
Q.18Hard
For an AC voltage controller with RMS output voltage of 230V from a 230V, 50Hz source at 30° firing angle, what is the power factor?
Answer: A
For AC voltage controller: PF = (1/π)√(π² - 4α²) × sin(2α)/(2α) where α = 30° = π/6. This yields PF ≈ 0.87 with leading reactive current.
Q.19Hard
In a soft-switching zero-voltage switching (ZVS) converter, the main advantage is:
Answer: B
ZVS eliminates capacitive discharge losses during switching, significantly reducing switching losses and high-frequency EMI emissions.
Q.20Hard
A MOSFET with on-state resistance RDS(on)=0.5Ω carries an average current of 50A at 100kHz. What is the approximate conduction loss?
Answer: B
Conduction loss = I²rms × RDS(on). With 50A average current (≈35.4A RMS) and 0.5Ω: Loss ≈ (35.4)² × 0.5 ≈ 625W. At high frequency, peak current factor increases loss to ~1250W.