Electrical Engineering questions for GATE, PSU recruitment and SSC JE draw from network theory, electrical machines, power systems, control systems, measurements and instrumentation, analog and digital electronics, and electromagnetic fields. Numerical answers include the formula used and the unit at each stage, which is where marks are commonly lost even when the approach is correct.
In an SR flip-flop, what happens when both S and R inputs are 1 simultaneously?
Answer: C
When both S=1 and R=1 in SR flip-flop, both Q and Q' become 1, violating the complementary relationship - this is the forbidden state.
Q.42Medium
A Johnson counter (twisted ring counter) with n flip-flops produces how many unique states before repeating?
Answer: B
A Johnson counter with n flip-flops generates 2n unique states (half of the theoretical 2^n), making it useful for decade counters.
Q.43Medium
In FPGA design, what does LUT (Lookup Table) primarily function as?
Answer: B
LUTs in FPGAs are programmable combinational logic blocks that can implement any logic function for inputs (typically 4-6 inputs).
Q.44Medium
What is the Fan-out limit of a TTL gate, and what does it signify?
Answer: B
Fan-out (typically 10 for TTL) is the maximum number of logic gate inputs that an output can reliably drive while maintaining specified voltage levels.
Q.45Medium
What is the characteristic equation of a D flip-flop?
Answer: A
The D flip-flop captures input D on clock edge and transfers it to output: Q(n+1) = D. This represents 'data' or 'delay' functionality.
Q.46Medium
Which of the following correctly describes the difference between combinational and sequential logic?
Answer: B
Combinational circuits produce outputs based solely on current inputs. Sequential circuits have memory elements (flip-flops) and outputs depend on input history.
Q.47Medium
What is the main purpose of tristate logic (three-state logic) in digital circuits?
Answer: B
Tristate logic provides high, low, and high-impedance states, enabling multiple devices to connect to a single bus by controlling which device actively drives the line.
Q.48Medium
In a 4-bit binary counter using JK flip-flops, if the propagation delay of each flip-flop is 10 ns, what is the maximum counting frequency?
Answer: B
Maximum frequency = 1/(4 × propagation delay) = 1/(4 × 10 ns) = 12.5 MHz. For ripple counters, the total delay is n × tpd.
Q.49Medium
In a Mealy state machine design for a sequence detector (detecting '101'), the output depends on:
Answer: C
Mealy machines produce outputs based on both the current state and input variables, unlike Moore machines which depend only on the current state. This makes Mealy machines more efficient in detecting sequences.
Q.50Medium
A priority encoder with 8 inputs has the highest priority assigned to the MSB. If inputs I7=1, I5=1, I3=1, and all others are 0, what is the output?
Answer: A
In a priority encoder with MSB having highest priority, when I7=1 (highest priority input), the output represents position 7, which is 111 in 3-bit binary. Lower priority inputs I5 and I3 are ignored.
