A negative feedback system's loop gain L(s) = G(s)H(s) has a pole-zero excess of 2. What can be concluded?
Answer: B
Pole-zero excess affects the phase behavior at high frequencies. A system with excess of 2 can be either stable or unstable depending on the gain value and pole locations.
Q.62Hard
A feedback system's sensitivity function S(s) = 1/(1+L(s)) where L(s) is loop gain. For large |L(s)|, what happens to |S(s)|?
Answer: B
When |L(s)| >> 1, the sensitivity function |S(s)| ≈ 1/|L(s)| becomes very small. This shows that high loop gain reduces sensitivity to parameter variations.
Q.63Hard
For a system to be controllable using state feedback u = -Kx, which condition must be satisfied?
Answer: C
Controllability requires the controllability matrix to have full rank n. This ensures all states can be moved from origin to any desired state
Q.64Hard
For improving transient response with minimal steady-state error impact, a lead compensator should be designed to add phase lead at:
Answer: B
Lead compensator adds phase lead at its designed center frequency ωm. For transient improvement, it should coincide with gain crossover frequency to increase phase margin
Q.65Hard
For the characteristic equation s⁴ + 8s³ + 24s² + 32s + 15 = 0, using Routh-Hurwitz criterion, the system is:
Answer: D
Routh table construction shows all positive elements in first column, indicating all poles in left half plane, making the system stable.
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Q.66Hard
In a root locus plot, the asymptotes for a system with 5 poles and 2 zeros meet at a point called:
Answer: B
Centroid (center of asymptotes) = [Σpoles - Σzeros]/[number of poles - number of zeros]. Number of asymptotes = 5-2 = 3.
Q.67Hard
For a system with Gc(s)G(s)H(s) = 100/[s(s+5)], the phase at ω = 5 rad/s is approximately:
The sensitivity function S(s) in a feedback control system is defined as:
Answer: B
Sensitivity S(s) = ∂Y/∂G ÷ Y/G = 1/[1+G(s)H(s)] for unity feedback systems. It measures effect of parameter variations.
Q.69Hard
In a Type-2 system with step, ramp, and parabolic inputs, the steady-state error with parabolic input A·t²/2 and loop gain Kv = 5 is:
Answer: C
For a Type-2 system, parabolic error is ess = A/Ka where Ka = lim[s→0] s²G(s)H(s). Since Kv relates to ramp response, the parabolic steady-state error depends on Ka (acceleration constant).
Q.70Hard
In a three-phase inverter, 180° conduction mode means:
Answer: A
In 180° conduction, each switch conducts for half the fundamental cycle (180°), typically producing a 6-step output. 120° conduction has each switch on for 120° only.
Q.71Hard
Which of the following has the lowest on-state voltage drop among power semiconductor devices?
Answer: B
MOSFETs have the lowest on-state voltage drop (few hundred millivolts) at moderate currents. IGBTs: ~1-2V, SCRs: ~1-2V, Diodes: ~0.7-1V depending on rating.
Q.72Hard
The snubber circuit in power electronics is used to:
Answer: A
Snubber circuits (RC networks) protect switching devices from transient voltage spikes during switching transitions and reduce switching losses.
Q.73Hard
In a soft-start thyristor converter, the firing angle is gradually increased to:
Answer: A
Soft-start increases firing angle gradually from maximum value, reducing dv/dt and inrush current, protecting equipment and supply system from transients.
Q.74Hard
The turn-off time (toff) of a power transistor includes:
Answer: B
Turn-off time (toff) = Storage time (ts) + Fall time (tf). Storage time is delay before current starts decreasing; fall time is the time for current to reach zero.
Q.75Hard
In a boost converter operating in continuous conduction mode (CCM), the average output voltage relationship is:
Answer: B
Boost converter output voltage: Vo = Vin / (1 - D), where D is duty cycle. This always produces Vo > Vin for 0 < D < 1.
Q.76Hard
The dv/dt rating of a power semiconductor is important because it:
Answer: B
High dv/dt can cause displacement currents through parasitic capacitances, potentially triggering devices unintentionally. dv/dt rating specifies the maximum safe rate of voltage change.
Q.77Hard
In a three-level diode-clamped inverter (Neutral Point Clamped), the advantage over two-level inverter is:
Answer: B
Three-level inverter generates three voltage levels, reducing the step size and dv/dt compared to two-level inverter, thus reducing EMI and stress on motor windings.
Q.78Hard
Which control strategy for a DC-DC converter provides the tightest output voltage regulation under varying input voltage and load conditions?
Answer: B
Closed-loop feedback control with error amplifier and compensation networks provides superior regulation by continuously adjusting duty cycle based on output voltage error.
Q.79Hard
In a synchronous buck converter, the advantages of using a low-side MOSFET instead of a diode are:
Answer: D
Synchronous MOSFETs have lower on-state resistance than diode forward voltage drop, reducing losses. Active switching also allows higher frequency operation with better control.
Q.80Hard
In a forward converter, the energy stored in the magnetizing inductance during the ON time is transferred to:
Answer: C
In a forward converter, when the switch turns OFF, the magnetizing inductance energy is transferred back to the input source through the demagnetization winding
