Electronics and Communication questions reward anyone who is comfortable moving between the time domain and the frequency domain. This set covers network theory, analog and digital circuits, signals and systems, control systems, communication systems, and electromagnetics. Numerical solutions keep the units visible at every step, since a dropped factor is the most common reason a correct method still produces a wrong option.
In a 4-bit ripple counter using negative edge-triggered flip-flops, if the input frequency is 16 MHz, what is the frequency at the output of the third flip-flop?
Answer: A
In a ripple counter, each flip-flop divides the frequency by 2. The third flip-flop output frequency = 16 MHz / 2³ = 816 = 2 MHz
Q.22Easy
Which logic gate produces HIGH output only when both inputs are different?
Answer: B
XOR (Exclusive OR) gate produces HIGH output when inputs are different (01 or 10). When inputs are same (00 or 11), output is LOW
Q.23Easy
A SR flip-flop with S=0, R=0 results in:
Answer: C
When S=0 and R=0, the SR flip-flop holds its previous state. No change occurs because neither set nor reset is activated
In a synchronous counter design, what is the main advantage over asynchronous counters?
Answer: C
Synchronous counters clock all flip-flops simultaneously, eliminating propagation delay problems. This allows higher operating frequencies without cumulative timing errors present in ripple counters
Q.26Easy
A 3-to-8 decoder has how many output lines, and what is the number of active outputs for any single input combination?
Answer: A
A 3-to-8 decoder has 2³ = 8 output lines. For any valid input combination, exactly 1 output line is activated (HIGH), while others remain LOW
Q.27Medium
In Booth's multiplication algorithm, which sequence of multiplier bits requires the fewest operations?
Answer: B
Booth's algorithm replaces consecutive 1s with a single subtraction and addition operation. Consecutive 1s (like 0111) are treated as 1000-1, reducing computation steps compared to processing each 1 individually
Q.28Medium
What is the setup time in a flip-flop?
Answer: B
Setup time (tsu) is the minimum duration the input signal must remain stable and valid before the active clock edge for reliable capture and state change
Q.29Medium
For a modulo-6 counter using JK flip-flops, how many flip-flops are required at minimum?
Answer: B
For modulo-N counter, minimum flip-flops required = ⌈log₂(N)⌉. For modulo-6: ⌈log₂(6)⌉ = ⌈2.58⌉ = 3 flip-flops (counts 0-5)
Q.30Medium
Which multiplexer configuration is used to implement any Boolean function with minimum gates?
Answer: C
An n-variable Boolean function can be efficiently implemented using a 2ⁿ-to-1 multiplexer where variables form select lines and minterms form data inputs, achieving minimal gate implementation
Q.31Easy
In VHDL, what does the 'rising_edge' function detect?
Answer: B
'rising_edge' detects a transition from LOW (0) to HIGH (1) on a signal, commonly used in synchronous designs to trigger actions on positive clock edges
Q.32Medium
A 4-bit binary subtractor using 2's complement method requires:
Answer: A
2's complement subtraction (A-B) converts to addition A+2's complement of B. This requires 4 full adders (for addition) and XOR gates (for bit complementing), avoiding dedicated subtractors
Q.33Medium
In a magnitude comparator for 4-bit numbers, if A > B, A = B, and A < B outputs are provided, what is the total number of output combinations possible?
Answer: B
A magnitude comparator produces exactly 3 mutually exclusive outputs: A>B (1,0,0) or A=B (0,1,0) or A<B (0,0,1). These are the only 3 possible comparison results for any input pair
Q.34Medium
What is the hold time in a flip-flop, and why is it critical?
Answer: B
Hold time (th) is the minimum duration input must remain stable after the clock edge. Violation can cause metastability—a state where flip-flop output is uncertain or oscillates unpredictably
Q.35Easy
Which of the following is NOT a characteristic of ROM (Read-Only Memory)?
Answer: B
Standard ROM is programmed during manufacturing and cannot be reprogrammed by users. PROM, EPROM, and EEPROM allow user programming, but basic ROM does not
Q.36Easy
In a 16×4 RAM, what do the numbers 16 and 4 represent respectively?
Answer: D
16×4 RAM means 16 memory words (locations), each storing 4 bits of data. This requires log₂(16)=4 address lines. Total capacity = 16 words × 4 bits = 64 bits
Q.37Hard
Design a 3-bit Up/Down counter. If control signal C=1 for Up and C=0 for Down, which additional gates are required in a synchronous design?
Answer: C
Up/Down counters require multiplexers to select between up and down count logic. Additional XOR/XNOR gates are needed to conditionally modify JK inputs based on control signal C
Q.38Medium
In a cascaded 4-bit counter system where two 4-bit counters are connected, what maximum count value can be achieved?
Answer: B
Two cascaded 4-bit counters form an 8-bit counter system. Maximum count = 2⁸ - 1 = 255 (counts from 0 to 255, total 256 states)
Q.39Medium
Which encoding scheme minimizes errors during binary-to-decimal conversion in digital systems?
Answer: B
Gray Code changes only one bit between consecutive numbers, minimizing transition errors. This prevents multiple simultaneous bit transitions that could cause undefined intermediate states
Q.40Medium
In a state machine with 7 states, how many flip-flops are needed for the state register?
Answer: B
For N states, minimum flip-flops required = ⌈log₂(N)⌉. For 7 states: ⌈log₂(7)⌉ = ⌈2.807⌉ = 3 flip-flops (can represent 2³=8 states)
