In a 3-to-8 decoder, if the binary input is 101, which output line will be activated?
A Line 5 B Line 6 C Line 3 D Line 7
Binary 101 = 5 in decimal, so output line 5 is activated in a decoder.
Which of the following logic gates has an output of 1 only when both inputs are different?
A XOR gate B XNOR gate C AND gate D NOR gate
XOR (Exclusive OR) produces 1 when inputs are different and 0 when they are same.
What is the Boolean expression for a 2-input NAND gate?
A Y = (A+B)' B Y = (A.B)' C Y = A'.B' D Y = A+B
NAND gate is the complement of AND, so Y = (A.B)' where . represents AND operation.
In a Multiplexer (MUX), how many select lines are required for an 8:1 MUX?
A 2 lines B 3 lines C 4 lines D 8 lines
For 2^n inputs, n select lines are needed. For 8 inputs, log₂(8) = 3 select lines.
What is the maximum frequency of operation for a JK flip-flop with setup time 5ns, hold time 3ns, and propagation delay 8ns?
A 62.5 MHz B 83.3 MHz C 125 MHz D 100 MHz
Maximum frequency = 1/(setup time + propagation delay) = 1/(5+3)ns = 8 1
In a Mealy state machine, the output depends on which of the following?
A Present state only B Present state and present input C Previous state only D Clock signal only
Mealy machines have outputs dependent on both current state and current input, unlike Moore machines which depend only on state.
What is the primary purpose of using parity bits in error detection?
A To increase data transmission speed B To detect single bit errors in data C To encrypt sensitive information D To reduce memory requirements
Parity bits are used for error detection by tracking whether the number of 1s in data is even or odd.
In a 4-bit Binary Weighted DAC, what is the weight of the MSB compared to the LSB?
A 2 times B 4 times C 8 times D 16 times
For a 4-bit DAC, MSB weight = 2^(4-1) = 8 times the LSB weight.
Which semiconductor memory loses its data when power is switched off?
A EEPROM B Flash memory C DRAM D ROM
DRAM (Dynamic RAM) is volatile and requires periodic refreshing. Data is lost without power, unlike non-volatile memories like ROM, EEPROM, and Flash.
In Booth's algorithm for multiplication, what is the purpose of examining the last two bits (current and previous)?
A To determine if addition or subtraction is needed B To identify potential overflow conditions C To check for parity errors D To initialize the accumulator
Booth's algorithm examines consecutive bits to reduce the number of addition operations by detecting transitions from 0 to 1 and 1 to 0.
What is the truth table output for a D flip-flop when CLK = 1 and D = 1?
A Q = 0, Q' = 1 B Q = 1, Q' = 0 C Q = D, Q' = D' D Q and Q' remain unchanged
In a D flip-flop, Q takes the value of D on the clock edge. When D = 1, Q becomes 1 and Q' becomes 0.
How many AND gates are required to implement a 3:8 decoder?
A 3 AND gates B 6 AND gates C 8 AND gates D 4 AND gates
A 3:8 decoder has 8 output lines, and each requires one AND gate (with appropriate inversions of inputs).
In a synchronous counter design, what is the main advantage over an asynchronous counter?
A Lower power consumption B Elimination of timing skew and glitches C Simpler circuit design D Requires fewer flip-flops
Synchronous counters have all flip-flops clocked simultaneously, eliminating propagation delay issues and glitches present in asynchronous counters.
What is the output of a full adder when A=1, B=1, and Cin=1?
A Sum=1, Cout=0 B Sum=0, Cout=1 C Sum=1, Cout=1 D Sum=0, Cout=0
Full adder: A+B+Cin = 1+1+1 = 3 (binary 11). Sum = 1, Carry out = 1.
In a 8×4 RAM configuration, what do 8 and 4 respectively represent?
A 8 data lines and 4 address lines B 8 address locations and 4 bits per location C 8 bits and 4 bytes of storage D 8 control signals and 4 chip selects
In RAM notation m×n, m represents number of addressable locations and n represents bits per location.
Which of the following represents the canonical form of the Boolean expression for XOR gate?
A Y = AB' + A'B B Y = AB + A'B' C Y = A'B + AB' D Both A and C
XOR truth table: Y=1 when inputs differ. Both AB' + A'B and A'B + AB' are equivalent canonical forms.
In a Finite State Machine (FSM) with 7 states, what is the minimum number of flip-flops required?
A 2 flip-flops B 3 flip-flops C 4 flip-flops D 7 flip-flops
Minimum flip-flops needed = ⌈log₂(number of states)⌉ = ⌈log₂(7)⌉ = 3.
What is the primary function of a Priority Encoder?
A To convert binary to Gray code B To select the highest priority input and encode it C To multiply two binary numbers D To compare two binary numbers
A Priority Encoder produces a binary output representing the highest priority active input among multiple inputs.
In pipelined architecture, what does increasing the number of pipeline stages primarily result in?
A Decreased power consumption B Increased instruction throughput but increased latency C Decreased memory requirements D Reduced circuit complexity
More pipeline stages increase throughput (instructions per cycle) but increase latency (clock-to-output delay) due to increased stage delays.
How does the Kogge-Stone adder compare to the Ripple Carry Adder in terms of propagation delay for a 32-bit addition?
A Kogge-Stone has higher delay due to complex interconnects B Kogge-Stone has logarithmic delay O(log n) while RCA has linear O(n) delay C Both have the same propagation delay D Ripple Carry Adder is faster for 32-bit operations
Kogge-Stone is a parallel prefix adder with O(log n) delay compared to Ripple Carry Adder's O(n) linear delay, making it faster for larger bit widths.
