Govt. Exams
Entrance Exams
Early voltage (VA) is a parameter that depends on the base width modulation effect with collector-base reverse bias voltage.
In triode region, the condition VDS < VGS - VTh allows the channel to conduct with resistance proportional to VDS.
Holding current IH: minimum anode current to sustain regenerative action (latching); if IA < IH, device reverts to blocking state.
Photodiode: Iph = η·q·Φ where η is quantum efficiency and Φ is incident photon flux; reverse bias increases depletion width for carrier collection.
CLM: as VDS increases, pinch-off point moves toward source, reducing effective channel length; output resistance Rds = VA/ID = λ⁻¹.
GBW ≈ fT; BJT current gain drops with frequency as β·f ≈ constant, where fT is extrapolated cutoff frequency (~1GHz for silicon BJTs).
CMOS dynamic power = CV²f dominates; ideal CMOS has zero static power as pull-up and pull-down never conduct simultaneously.
Active region requires base-emitter junction forward biased (~0.7V) and collector-base reverse biased (VCE > saturation voltage).
PIN diodes have wide intrinsic region that reduces capacitance while increasing carrier transit time, ideal for RF switching.
Depletion width W = √(2εV/qNd·Na/(Nd+Na)), dependent on applied voltage and doping concentrations.