Govt. Exams
Entrance Exams
JFETs are called depletion-type devices because the channel is formed by a depletion region. The p-n junction (gate-channel) creates a depletion layer that widens with reverse bias, pinching off the channel.
For silicon at 300K, the built-in potential is typically 0.7 V, determined by V_bi = (kT/q)ln(N_a*N_d/n_i²). This value is fundamental for silicon device calculations.
Reverse bias voltage increases the electric field across the junction, expanding the depletion region width. The depletion width W is proportional to √V_r where V_r is reverse bias.
Enhancement-mode NMOS has positive VTh (typically 0.5-2V) because an inversion layer must be created at positive gate voltage.
VT = kT/q where k=1.38×10⁻²³ J/K, T=300K, q=1.6×10⁻¹⁹C gives approximately 26 mV or 25 mV.
In saturation, both BE and BC junctions are forward biased, resulting in VCE dropping to approximately 0.2-0.3V for silicon transistors.
In intrinsic semiconductors, thermally generated electrons and holes are in equal numbers, making ni = pi at thermal equilibrium.
Reverse bias widens the depletion region by pulling majority carriers away from the junction, increasing the width of the space charge region.
Germanium has Eg ≈ 0.66 eV at 300K, lowest among common semiconductors; causes high intrinsic carrier concentration and leakage current.
Forward bias injects minority carriers; their recombination releases energy as photons (electroluminescence) in direct bandgap semiconductors.
