Govt. Exams
Entrance Exams
Commutation overlap occurs due to finite source impedance. The overlap angle μ = sin⁻¹(ωLₛI/√2×Vline), depending on source inductance and current.
For half-wave rectifier: Vrms = (Vm/2)√[(π - α + sin(2α))/(2π)] where α = 45° = π/4, Vm = 230√2 = 325.3V. Vrms ≈ 108.6V
Latch-up in CMOS and power devices occurs when parasitic p-n-p and n-p-n transistors form a regenerative feedback loop, causing high current and potential device destruction
Synchronous rectifier gate drive must be timed with the primary switch to replace the body diode conduction, typically during the primary switch OFF period
For a three-phase half-wave uncontrolled rectifier, Vdc = (3√3/2π) × Vm ≈ 0.827 × Vm
In a forward converter, when the switch turns OFF, the magnetizing inductance energy is transferred back to the input source through the demagnetization winding
Synchronous MOSFETs have lower on-state resistance than diode forward voltage drop, reducing losses. Active switching also allows higher frequency operation with better control.
Closed-loop feedback control with error amplifier and compensation networks provides superior regulation by continuously adjusting duty cycle based on output voltage error.
Three-level inverter generates three voltage levels, reducing the step size and dv/dt compared to two-level inverter, thus reducing EMI and stress on motor windings.
High dv/dt can cause displacement currents through parasitic capacitances, potentially triggering devices unintentionally. dv/dt rating specifies the maximum safe rate of voltage change.
