Govt. Exams
Entrance Exams
In a 3-to-8 decoder with active low enable and select lines = 000, only output 0 is activated (becomes 0), while all others remain 1.
Setup time (t_su) is the minimum duration that the input signal must be stable and valid before the active clock edge for reliable operation.
The carry output of a full adder is: C_out = (A·B) + (B·C_in) + (A·C_in), which requires both AND and OR gates.
A Johnson counter (twisted ring counter) has a sequence length of 2n, where n is the number of flip-flops. For 4 flip-flops: 2×4 = 8 states.
In synchronous counters, all flip-flops are clocked simultaneously, so the maximum frequency is limited only by the propagation delay of a single flip-flop, not the cumulative delay.
For N states, minimum flip-flops required = ⌈log₂(N)⌉. For 7 states: ⌈log₂(7)⌉ = ⌈2.807⌉ = 3 flip-flops (can represent 2³=8 states)
Gray Code changes only one bit between consecutive numbers, minimizing transition errors. This prevents multiple simultaneous bit transitions that could cause undefined intermediate states
Two cascaded 4-bit counters form an 8-bit counter system. Maximum count = 2⁸ - 1 = 255 (counts from 0 to 255, total 256 states)
Hold time (th) is the minimum duration input must remain stable after the clock edge. Violation can cause metastability—a state where flip-flop output is uncertain or oscillates unpredictably
A magnitude comparator produces exactly 3 mutually exclusive outputs: A>B (1,0,0) or A=B (0,1,0) or A<B (0,0,1). These are the only 3 possible comparison results for any input pair
