Govt. Exams
Entrance Exams
Asynchronous (ripple) counters work by cascading flip-flops where the output of one flip-flop triggers the next, creating a ripple effect.
Combinational circuits: output = f(present inputs only). Sequential circuits: output depends on present inputs AND past states (memory elements like flip-flops store history)
16×4 RAM means 16 memory words (locations), each storing 4 bits of data. This requires log₂(16)=4 address lines. Total capacity = 16 words × 4 bits = 64 bits
Standard ROM is programmed during manufacturing and cannot be reprogrammed by users. PROM, EPROM, and EEPROM allow user programming, but basic ROM does not
'rising_edge' detects a transition from LOW (0) to HIGH (1) on a signal, commonly used in synchronous designs to trigger actions on positive clock edges
A 3-to-8 decoder has 2³ = 8 output lines. For any valid input combination, exactly 1 output line is activated (HIGH), while others remain LOW
Decimal 5 = Binary 0101. Gray code is obtained by: G0=B0=1, G1=B0⊕B1=0⊕1=1, G2=B1⊕B2=1⊕0=1, G3=B2⊕B3=0⊕0=0. Result: 0111
When S=0 and R=0, the SR flip-flop holds its previous state. No change occurs because neither set nor reset is activated
XOR (Exclusive OR) gate produces HIGH output when inputs are different (01 or 10). When inputs are same (00 or 11), output is LOW
In a ripple counter, each flip-flop divides the frequency by 2. The third flip-flop output frequency = 16 MHz / 2³ = 16 / 8 = 2 MHz
