Home Subjects Electronics (ECE) Digital Electronics

Electronics (ECE)
Digital Electronics

Analog/digital electronics, communication

50 Q 4 Topics Take Mock Test
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Difficulty: All Easy Medium Hard 11–20 of 50
Topics in Electronics (ECE)
What is the main advantage of using CMOS technology over NMOS in digital circuits?
A Higher power consumption
B Lower power dissipation and better noise immunity
C Simpler circuit design
D Faster clock speeds
Correct Answer:  B. Lower power dissipation and better noise immunity
EXPLANATION

CMOS technology uses complementary pairs of transistors resulting in lower static power dissipation and better noise margins compared to NMOS.

Test
What is the primary function of a Priority Encoder?
A To convert binary to Gray code
B To select the highest priority input and encode it
C To multiply two binary numbers
D To compare two binary numbers
Correct Answer:  B. To select the highest priority input and encode it
EXPLANATION

A Priority Encoder produces a binary output representing the highest priority active input among multiple inputs.

Test
In a Finite State Machine (FSM) with 7 states, what is the minimum number of flip-flops required?
A 2 flip-flops
B 3 flip-flops
C 4 flip-flops
D 7 flip-flops
Correct Answer:  B. 3 flip-flops
EXPLANATION

Minimum flip-flops needed = ⌈log₂(number of states)⌉ = ⌈log₂(7)⌉ = 3.

Test
Which of the following represents the canonical form of the Boolean expression for XOR gate?
A Y = AB' + A'B
B Y = AB + A'B'
C Y = A'B + AB'
D Both A and C
Correct Answer:  D. Both A and C
EXPLANATION

XOR truth table: Y=1 when inputs differ. Both AB' + A'B and A'B + AB' are equivalent canonical forms.

Test
In a synchronous counter design, what is the main advantage over an asynchronous counter?
A Lower power consumption
B Elimination of timing skew and glitches
C Simpler circuit design
D Requires fewer flip-flops
Correct Answer:  B. Elimination of timing skew and glitches
EXPLANATION

Synchronous counters have all flip-flops clocked simultaneously, eliminating propagation delay issues and glitches present in asynchronous counters.

Test
How many AND gates are required to implement a 3:8 decoder?
A 3 AND gates
B 6 AND gates
C 8 AND gates
D 4 AND gates
Correct Answer:  C. 8 AND gates
EXPLANATION

A 3:8 decoder has 8 output lines, and each requires one AND gate (with appropriate inversions of inputs).

Test
In Booth's algorithm for multiplication, what is the purpose of examining the last two bits (current and previous)?
A To determine if addition or subtraction is needed
B To identify potential overflow conditions
C To check for parity errors
D To initialize the accumulator
Correct Answer:  A. To determine if addition or subtraction is needed
EXPLANATION

Booth's algorithm examines consecutive bits to reduce the number of addition operations by detecting transitions from 0 to 1 and 1 to 0.

Test
In a 4-bit Binary Weighted DAC, what is the weight of the MSB compared to the LSB?
A 2 times
B 4 times
C 8 times
D 16 times
Correct Answer:  C. 8 times
EXPLANATION

For a 4-bit DAC, MSB weight = 2^(4-1) = 8 times the LSB weight.

Test
In a Mealy state machine, the output depends on which of the following?
A Present state only
B Present state and present input
C Previous state only
D Clock signal only
Correct Answer:  B. Present state and present input
EXPLANATION

Mealy machines have outputs dependent on both current state and current input, unlike Moore machines which depend only on state.

Test
What is the maximum frequency of operation for a JK flip-flop with setup time 5ns, hold time 3ns, and propagation delay 8ns?
A 62.5 MHz
B 83.3 MHz
C 125 MHz
D 100 MHz
Correct Answer:  C. 125 MHz
EXPLANATION

Maximum frequency = 1/(setup time + propagation delay) = 1/(5+3)ns = 1/8ns = 125 MHz.

Test
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