Govt. Exams
Entrance Exams
The depletion region widens with more negative VGS, pinching off the channel and reducing ID until pinch-off voltage is reached.
Photocurrent Iph = η·(q/hf)·Φ, where η is quantum efficiency and Φ is incident optical power.
When both junctions are forward biased, the transistor operates in saturation region where collector current is maximum and relatively independent of base current.
Terminal voltage = Vz + Iz·Rz = 12 + (50×10^-3 × 5) = 12 + 0.25 = 12.25 V
Clamping diodes protect circuits by limiting the maximum voltage that can be applied to a node. They conduct when voltage exceeds V_DD + V_D_forward or goes below V_SS - V_D_forward, preventing overstress to gate oxide and junctions.
The reverse saturation current I_0 doubles for every 5-7°C rise in silicon at room temperature. Since I_CO ≈ I_0, it also doubles per 5-7°C, or roughly per 10°C it increases significantly (by factor of ≈1.5-2).
JFETs are called depletion-type devices because the channel is formed by a depletion region. The p-n junction (gate-channel) creates a depletion layer that widens with reverse bias, pinching off the channel.
For silicon at 300K, the built-in potential is typically 0.7 V, determined by V_bi = (kT/q)ln(N_a*N_d/n_i²). This value is fundamental for silicon device calculations.
Reverse bias voltage increases the electric field across the junction, expanding the depletion region width. The depletion width W is proportional to √V_r where V_r is reverse bias.
Enhancement-mode NMOS has positive VTh (typically 0.5-2V) because an inversion layer must be created at positive gate voltage.
