Home Subjects Electronics (ECE)

Electronics (ECE)

Analog/digital electronics, communication

78 Q 4 Topics Take Mock Test
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Difficulty: All Easy Medium Hard 41–50 of 78
Topics in Electronics (ECE)
A Moore FSM differs from a Mealy FSM in which aspect?
A Number of states
B Output depends only on current state in Moore, but on current state and inputs in Mealy
C Moore uses more flip-flops
D Mealy cannot have feedback loops
Correct Answer:  B. Output depends only on current state in Moore, but on current state and inputs in Mealy
EXPLANATION

Moore FSM outputs depend only on current state, while Mealy FSM outputs depend on both current state and current inputs, allowing faster response.

Test
In a complex digital system, what does 'Setup time' refer to?
A Time for circuit initialization
B Minimum time data must be stable before clock edge
C Time to power up the system
D Duration of reset pulse
Correct Answer:  B. Minimum time data must be stable before clock edge
EXPLANATION

Setup time is the minimum duration that the input data must be stable and valid before the active clock edge arrives at the flip-flop.

Test
How does the Kogge-Stone adder compare to the Ripple Carry Adder in terms of propagation delay for a 32-bit addition?
A Kogge-Stone has higher delay due to complex interconnects
B Kogge-Stone has logarithmic delay O(log n) while RCA has linear O(n) delay
C Both have the same propagation delay
D Ripple Carry Adder is faster for 32-bit operations
Correct Answer:  B. Kogge-Stone has logarithmic delay O(log n) while RCA has linear O(n) delay
EXPLANATION

Kogge-Stone is a parallel prefix adder with O(log n) delay compared to Ripple Carry Adder's O(n) linear delay, making it faster for larger bit widths.

Test
In pipelined architecture, what does increasing the number of pipeline stages primarily result in?
A Decreased power consumption
B Increased instruction throughput but increased latency
C Decreased memory requirements
D Reduced circuit complexity
Correct Answer:  B. Increased instruction throughput but increased latency
EXPLANATION

More pipeline stages increase throughput (instructions per cycle) but increase latency (clock-to-output delay) due to increased stage delays.

Test
A SRAM cell requires how many transistors for a 1-bit storage?
A 2 transistors
B 4 transistors
C 6 transistors
D 8 transistors
Correct Answer:  C. 6 transistors
EXPLANATION

A typical SRAM cell uses 6 transistors: 4 for the cross-coupled latch (2 NMOS + 2 PMOS) and 2 access transistors for read/write operations.

Test
In Hamming code for single error correction, if the total number of data bits is 16, how many parity bits are required?
A 3 parity bits
B 4 parity bits
C 5 parity bits
D 6 parity bits
Correct Answer:  C. 5 parity bits
EXPLANATION

For Hamming code, if 'p' is the number of parity bits, then 2^p ≥ (p + data bits). For 16 data bits: 2^p ≥ p + 16. Testing: 2^5 = 32 ≥ 5 + 16 = 21. ✓

Test
Design a 3-bit Up/Down counter. If control signal C=1 for Up and C=0 for Down, which additional gates are required in a synchronous design?
A Only AND gates
B Only OR gates
C Multiplexers and additional logic
D Only NAND gates
Correct Answer:  C. Multiplexers and additional logic
EXPLANATION

Up/Down counters require multiplexers to select between up and down count logic. Additional XOR/XNOR gates are needed to conditionally modify JK inputs based on control signal C

Test
For a 3-bit Johnson counter, the maximum count is:
A 3
B 6
C 7
D 8
Correct Answer:  B. 6
EXPLANATION

Johnson counter (twisted ring counter) has 2n states for n flip-flops. For 3-bit: 2×3 = 6 states. It's more efficient than ripple counter but less than binary counter.

Test
In a heterostructure bipolar transistor (HBT), the wide bandgap material in the emitter provides which advantage?
A Higher emitter injection efficiency and reduced base current
B Lower cutoff frequency
C Increased thermal noise
D Reduced breakdown voltage
Correct Answer:  A. Higher emitter injection efficiency and reduced base current
EXPLANATION

Wide bandgap emitter (e.g., AlGaAs) blocks minority carrier injection from base, improving γE and allowing lower base doping for higher β.

Test
A MESFET (Metal-Semiconductor FET) differs from a JFET primarily in which aspect?
A Gate material is metal-semiconductor junction instead of p-n junction
B It operates in enhancement mode only
C Higher input impedance than JFET
D Used exclusively in low-frequency applications
Correct Answer:  A. Gate material is metal-semiconductor junction instead of p-n junction
EXPLANATION

MESFET uses Schottky (metal-semiconductor) junction for gate control instead of p-n junction, enabling high-frequency GaAs implementation.

Test
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