In transient stability studies, which machine variable is most critical for assessing first-swing stability?

The correct answer is A: Speed deviation (Δω). Speed deviation determines if the generator can maintain synchronism during the first swing after a disturbance. Excessive Δω leads to loss of synchronism.

In a half-bridge inverter, what is the minimum dead time required to prevent shoot-through if the switching frequency is 20kHz?

The correct answer is C: 2.0μs. Dead time should be 2-3 times the device switching time (~0.5-1μs for modern IGBTs), typically 1-3μs to ensure safe commutation.

What is the primary function of an encoder in digital electronics?

The correct answer is C: Convert active input lines into coded output. Encoder produces binary-coded output corresponding to only one active input line among many inputs

In Indian power systems, what is the standard voltage level for inter-state transmission?

The correct answer is B: 220 kV and 400 kV. Indian power system uses 220 kV and 400 kV for long-distance inter-state power transmission as per POWERGRID standards.

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Electrical Engg (EEE)

Electrical machines, power systems, circuits

321 Q 7 Topics Take Mock Test

Difficulty: All Easy Medium Hard 1–10 of 321

Topics in Electrical Engg (EEE)

All Circuit Analysis 100 Electrical Machines 100 Power Systems 100 Control Systems 100 Power Electronics 100 Electrical Measurements 40 Digital Electronics 100

Q.1 Medium Digital Electronics

A priority encoder with 8 inputs has the highest priority assigned to the MSB. If inputs I7=1, I5=1, I3=1, and all others are 0, what is the output?

A 111 (binary 7)

B 101 (binary 5)

C 011 (binary 3)

D 001 (binary 1)

Correct Answer: A. 111 (binary 7)

EXPLANATION

In a priority encoder with MSB having highest priority, when I7=1 (highest priority input), the output represents position 7, which is 111 in 3-bit binary. Lower priority inputs I5 and I3 are ignored.

Test

Q.2 Medium Digital Electronics

In a Mealy state machine design for a sequence detector (detecting '101'), the output depends on:

A Only the current state

B Only the input variables

C Both current state and input variables

D Previous state only

Correct Answer: C. Both current state and input variables

EXPLANATION

Mealy machines produce outputs based on both the current state and input variables, unlike Moore machines which depend only on the current state. This makes Mealy machines more efficient in detecting sequences.

Test

Q.3 Medium Digital Electronics

In a 4-bit binary counter using JK flip-flops, if the propagation delay of each flip-flop is 10 ns, what is the maximum counting frequency?

A 25 MHz

B 12.5 MHz

C 50 MHz

D 6.25 MHz

Correct Answer: B. 12.5 MHz

EXPLANATION

Maximum frequency = 1/(4 × propagation delay) = 1/(4 × 10 ns) = 12.5 MHz. For ripple counters, the total delay is n × tpd.

Test

Q.4 Medium Digital Electronics

What is the main purpose of tristate logic (three-state logic) in digital circuits?

A Increase operating speed

B Allow multiple outputs to share the same bus line without electrical conflicts

C Reduce power consumption

D Improve noise immunity

Correct Answer: B. Allow multiple outputs to share the same bus line without electrical conflicts

EXPLANATION

Tristate logic provides high, low, and high-impedance states, enabling multiple devices to connect to a single bus by controlling which device actively drives the line.

Test

Q.5 Medium Digital Electronics

Which of the following correctly describes the difference between combinational and sequential logic?

A Combinational logic has memory while sequential logic does not

B Sequential logic depends on past inputs and has memory; combinational output depends only on current inputs

C Sequential logic is faster than combinational logic

D Combinational logic requires more components

Correct Answer: B. Sequential logic depends on past inputs and has memory; combinational output depends only on current inputs

EXPLANATION

Combinational circuits produce outputs based solely on current inputs. Sequential circuits have memory elements (flip-flops) and outputs depend on input history.

Test

Q.6 Medium Digital Electronics

What is the characteristic equation of a D flip-flop?

A Q(n+1) = D

B Q(n+1) = Q(n) + D

C Q(n+1) = Q(n) XOR D

D Q(n+1) = D AND Q(n)

Correct Answer: A. Q(n+1) = D

EXPLANATION

The D flip-flop captures input D on clock edge and transfers it to output: Q(n+1) = D. This represents 'data' or 'delay' functionality.

Test

Q.7 Medium Digital Electronics

What is the Fan-out limit of a TTL gate, and what does it signify?

A Maximum number of inputs that can be connected to output

B Maximum number of standard TTL loads that one output can drive without voltage degradation

C Power consumption per gate

D Maximum frequency of operation

Correct Answer: B. Maximum number of standard TTL loads that one output can drive without voltage degradation

EXPLANATION

Fan-out (typically 10 for TTL) is the maximum number of logic gate inputs that an output can reliably drive while maintaining specified voltage levels.

Test

Q.8 Medium Digital Electronics

In FPGA design, what does LUT (Lookup Table) primarily function as?

A Memory element for data storage

B Programmable logic block that implements combinational logic functions

C Clock distribution network

D Input/output buffer

Correct Answer: B. Programmable logic block that implements combinational logic functions

EXPLANATION

LUTs in FPGAs are programmable combinational logic blocks that can implement any logic function for inputs (typically 4-6 inputs).

Test

Q.9 Medium Digital Electronics

A Johnson counter (twisted ring counter) with n flip-flops produces how many unique states before repeating?

A 2^n states

B 2n states

C n states

D n+1 states

Correct Answer: B. 2n states

EXPLANATION

A Johnson counter with n flip-flops generates 2n unique states (half of the theoretical 2^n), making it useful for decade counters.

Test

Q.10 Medium Digital Electronics

In an SR flip-flop, what happens when both S and R inputs are 1 simultaneously?

A Output becomes 1

B Output becomes 0

C Invalid/forbidden state - both outputs become 1

D Output remains unchanged

Correct Answer: C. Invalid/forbidden state - both outputs become 1

EXPLANATION

When both S=1 and R=1 in SR flip-flop, both Q and Q' become 1, violating the complementary relationship - this is the forbidden state.

Test

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