Govt. Exams
Entrance Exams
In a priority encoder with MSB having highest priority, when I7=1 (highest priority input), the output represents position 7, which is 111 in 3-bit binary. Lower priority inputs I5 and I3 are ignored.
Mealy machines produce outputs based on both the current state and input variables, unlike Moore machines which depend only on the current state. This makes Mealy machines more efficient in detecting sequences.
Maximum frequency = 1/(4 × propagation delay) = 1/(4 × 10 ns) = 12.5 MHz. For ripple counters, the total delay is n × tpd.
Tristate logic provides high, low, and high-impedance states, enabling multiple devices to connect to a single bus by controlling which device actively drives the line.
Combinational circuits produce outputs based solely on current inputs. Sequential circuits have memory elements (flip-flops) and outputs depend on input history.
The D flip-flop captures input D on clock edge and transfers it to output: Q(n+1) = D. This represents 'data' or 'delay' functionality.
Fan-out (typically 10 for TTL) is the maximum number of logic gate inputs that an output can reliably drive while maintaining specified voltage levels.
LUTs in FPGAs are programmable combinational logic blocks that can implement any logic function for inputs (typically 4-6 inputs).
A Johnson counter with n flip-flops generates 2n unique states (half of the theoretical 2^n), making it useful for decade counters.
When both S=1 and R=1 in SR flip-flop, both Q and Q' become 1, violating the complementary relationship - this is the forbidden state.
